R5F564MLGDLC datasheet(170/228 Pages) RENESAS

Il numero della parte	R5F564MLGDLC

Spiegazioni elettronici	120-MHz 32-bit RX MCU, on-chip FPU, 240 DMIPS, up to 4-MB flash memory

PDF	228 Pages

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Produttore elettronici	RENESAS [Renesas Technology Corp]

Homepage	http://www.renesas.com

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170 / 228 page

R01DS0173EJ0110 Rev.1.10

Page 170 of 228

Oct 24, 2016

RX64M Group

5. Electrical Characteristics

5.3.6

EXDMAC Timing

Figure 5.30

EDREQ0 and EDREQ1 Input Timing

Figure 5.31

EDACK0 and EDACK1 Single-Address Transfer Timing (for a CS Area)

Table 5.22

EXDMAC Timing

Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 ≤ VREFH0 ≤ AVCC0,

VCC_USBA = AVCC_USBA = 3.0 to 3.6 V,

VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = VSS1_USBA = VSS2_USBA = PVSS_USBA = AVSS_USBA = 0 V,

ICLK = PCLKA = 8 to 120 MHz, PCLKB = BCLK = SDCLK = 8 to 60 MHz, Ta = Topr

Output load conditions: VOH = VCC × 0.5, VOL = VCC × 0.5, C = 30 pF

High-drive output is selected by the driving ability control register.

Item

Symbol

Min.

Max.

Unit

Test

Conditions

EXDMAC

EDREQ setup time

tEDRQS

—

Figure 5.30

EDREQ hold time

tEDRQH

2—

EDACK delay time

tEDACD

—

Figure 5.31,

Figure 5.32

BCLK pin

tEDRQS tEDRQH

EDREQ0,

EDREQ1

EDACK0,

EDACK1

tEDACD

BCLK pin

tEDACD

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