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WM8524 Scheda tecnica(PDF) 9 Page - Cirrus Logic

Il numero della parte WM8524
Spiegazioni elettronici  24-bit 192kHz Stereo DAC with 2Vrms
PDF  25 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8524 Scheda tecnica(HTML) 9 Page - Cirrus Logic

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Production Data
WM8524
w
PD, Rev 4.1, October 2011
9
AUDIO INTERFACE TIMING – SLAVE MODE
BCLK
(input)
LRCLK
(input)
DACDAT
(input)
tDS
tDH
tLRH
tLRSU
tBCH
tBCL
tBCY
VIH
VIL
VIH
VIL
VIH
VIL
Figure 2 Digital Audio Data Timing – Slave Mode
Test Conditions
LINEVDD=AVDD=2.97~3.63V, LINEGND=AGND=0V, TA=+25
°C, Slave Mode
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY
27
ns
BCLK pulse width high
tBCH
11
ns
BCLK pulse width low
tBCL
11
ns
LRCLK set-up time to BCLK rising edge
tLRSU
7
ns
LRCLK hold time from BCLK rising edge
tLRH
5
ns
DACDAT hold time from LRCLK rising edge
tDH
5
ns
DACDAT set-up time to BCLK rising edge
tDS
7
ns
Table 1 Slave Mode Audio Interface Timing
Note:
BCLK period should always be greater than or equal to MCLK period.



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