WM8950 datasheet(18/60 Pages) CIRRUS

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WM8950

Rev 4.5

AGND

MBVSEL=0

MICBIAS

= 1.8 x VMID

= 0.9 x AVDD

VMID

internal

resistor

internal

resistor

MBVSEL=1

MICBIAS

= 1.5 x VMID

= 0.75 x AVDD

Figure 9 Microphone Bias Schematic

ANALOGUE TO DIGITAL CONVERTER (ADC)

The WM8950 uses a multi-bit, oversampled sigma-delta ADC channel. The use of multi-bit feedback

and high oversampling rates reduces the effects of jitter and high frequency noise. The ADC Full

Scale input level is proportional to AVDD. With a 3.3V supply voltage, the full scale level is 1.0Vrms.

Any voltage greater than -1dBfs may overload the ADC and cause distortion.

ADC DIGITAL FILTERS

The ADC filters perform true 24 bit signal processing to convert the raw multi-bit oversampled data

from the ADC to the correct sampling frequency to be output on the digital audio interface. The digital

filter path is illustrated in Figure 10 .

ADC

DIGITAL

DECIMATOR

DIGITAL

FILTERS

GAIN

5-BAND

EQUALISER

HIGH PASS

FILTER

IIR

FILTER

DIGITAL

AUDIO

INTERFACE

ADC DIGITAL FILTERS

Figure 10 ADC Digital Filter Path

The ADC is enabled by the ADCEN register bit.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

Power

management 2

ADCEN

0 = ADC disabled

1 = ADC enabled

Table 8 ADC Enable

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