SMP9211 datasheet(6/10 Pages) SUMMIT

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Advance Information

page 6 of 6

SMP9210 SMP9211 SMP9212

SUMMIT

MICROELECTRONICS, Inc.

The third example illustrates the data sequence

for a two-byte command.

Special Configurations

The SMP9210 can be configured by the end

user or by Summit prior to shipment. There is one

configuration register and it is accessed through the

serial interface using 1001[b] as the device type

address. The register is shown below.

MSB

LSB

Config Register

Accessible

Config Register Locked

Power-on Recall all 0's

Power-on Recall all 1's

Power-on Recall Mid Scale

Power-on Recall NV-

VOUT = Low Z on Power-Down

VOUT = High Z on Power-Down

A A A A Programmable DAC Device Type

Address

Bit 0 - When bit 0 is written as a 1 the configuration

for reading and writing.

Bits 2:1 are use to select the power-on recall value to

be loaded into the DAC registers.

Bit 3 selects the power down option for the VOUT pins.

Bits 7:4 can be used to program unique DAC device

type identifiers. When the default 0101 is used the

number of SMP9210's allowed on a single bus is

limited to eight. This can be expanded infinitely if the

CS input is also used. The only drawback is the

decoding or use of port pins to drive the CS inputs. If

we assume no other devices on the bus and that

each DAC device type address is utilized, then the

end user can effectively have 256 individually

addressable devices on a single bus. Now,

combining this capability with the CS pin a microC

can enable blocks of 256 SMP9210's vs blocks of 8.

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