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ICS9DB104 Scheda tecnica(PDF) 7 Page - Integrated Circuit Systems |
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ICS9DB104 Scheda tecnica(HTML) 7 Page - Integrated Circuit Systems |
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7 / 13 page ![]() 7 Integrated Circuit Systems, Inc. ICS9DB104 0767C—07/19/04 SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD) Pin # Name Control Function Type 0 1 PWD Bit 7 RW driven Hi-Z 0 Bit 6 RW driven Hi-Z 0 Bit 5 RW X Bit 4 RW X Bit 3 RW X Bit 2 RW High BW Low BW 1 Bit 1 RW fan-out ZDB 1 Bit 0 RW div /2 x1 1 SMBus Table: Output Control Register Pin # Name Control Function Type 0 1 PWD Bit 7 RW 1 Bit 6 DIF_6 Output Control RW Disable Enable 1 Bit 5 DIF_5 Output Control RW Disable Enable 1 Bit 4 RW 1 Bit 3 RW 1 Bit 2 DIF_2 Output Control RW Disable Enable 1 Bit 1 DIF_1 Output Control RW Disable Enable 1 Bit 0 RW 1 SMBus Table: Output Control Register Pin # Name Control Function Type 0 1 PWD Bit 7 RW 0 Bit 6 DIF_6 Output Control RW Free-run Stoppable 0 Bit 5 DIF_5 Output Control RW Free-run Stoppable 0 Bit 4 RW 0 Bit 3 RW 0 Bit 2 DIF_2 Output Control RW Free-run Stoppable 0 Bit 1 DIF_1 Output Control RW Free-run Stoppable 0 Bit 0 RW 0 Byte 0 - PD# drive mode - SRC_Stop# drive - Reserved Reserved - Reserved Reserved - Reserved Reserved - PLL_BW# adjust - BYPASS#/PLL - SRC_DIV# Byte 1 - 23,22 20,19 - - 9,10 6,7 - Byte 2 - 23,22 20,19 - - 9,10 6,7 - Reserved Reserved Reserved User should write '0' to minimize power Reserved User should write '0' to minimize power Reserved User should write '0' to minimize power Reserved User should write '0' to minimize power Reserved Reserved Reserved Reserved Reserved Reserved |
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