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PI74LVC3245AS Scheda tecnica(PDF) 6 Page - Pericom Semiconductor Corporation |
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PI74LVC3245AS Scheda tecnica(HTML) 6 Page - Pericom Semiconductor Corporation |
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6 / 9 page ![]() ADVANCE INFORMATION PI74LVC3245A 8-Bit Dual Supply Bus Transceiver with 3-State Outputs 6 P-0.3 08/05/03 PARAMETER MEASUREMENT INFORMATION FOR A TO B PORT VCCA =2.7V TO 3.6V and VCCB = 5V ± 0.5V Load Circuit Voltage Waveforms Propagation Delay Times Voltage Waveforms Enable and Disable Times Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 500Ω 500 Ω 2xVCCB Open GND S1 From Output Under Test CL = 50pF (See Note A) 500Ω 500Ω 50 Input tPLH tPHL 0V B-Port Output VOH VOL 1.5V 1.5V 2.7V 50% VCCB 50% VCCB tPZL Output Control 0V 1.5V 50% VCCB 1.5V tPLZ tPHZ VOL VCCB 0V tPZH +0.3V –0.3V Output Waveform 1 S1 at 2 x VCCB (see Note B) Output Waveform 2 S1 at GND (see Note B) VOH VOH VOL 2.7V 50% VCCB Power- Up Considerations To avoid excessive supply current, bus contention or oscillation during power-up, the following guidelines should be followed: 1. Connect ground first before any supply voltage is applied. 2. Power up VCCA, which is the control side of the device. 3. Ramp OE ahead of or with VCCA to help prevent bus contention 4. Ramp DIR with VCCA if DIR high is needed (A bus to B bus). Otherwise keep DIR Low. Test S1 tPLH/tPHL Open tPLZ/tPZL 2 x VCCB tPHZ/tPZH GND |
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