ADCMP563/ADCMP564

Rev. A | Page 6 of 16

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

ADCMP563

TOP VIEW

(Not to Scale)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

–INA

+INA

QA

QA

GND

LEA

LEA

–INB

+INB

QB

QB

GND

LEB

LEB

ADCMP564

TOP VIEW

(Not to Scale)

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

–INA

QA

QA

GND

LEA

LEA

GND

+INA

HYSA

–INB

QB

QB

GND

LEB

LEB

GND

+INB

HYSB

Figure 4. ADCMP563 16-Lead QSOP Pin Configuration

Figure 5. ADCMP564 20-Lead QSOP Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

ADCMP563

ADCMP564

Mnemonic

Function

1

GND

Analog Ground.

1

2

QA

One of two complementary outputs for Channel A. QA is logic high if the analog voltage at the

noninverting input is greater than the analog voltage at the inverting input (provided the

comparator is in compare mode). See the description of Pin LEA for more information.

2

3

QA

One of two complementary outputs for Channel A. QA is logic low if the analog voltage at the

noninverting input is greater than the analog voltage at the inverting input (provided the

comparator is in compare mode). See the description of Pin LEA for more information.

3

4

GND

Analog Ground.

4

5

LEA

One of two complementary inputs for Channel A Latch Enable. In compare mode (logic high),

the output tracks changes at the input of the comparator. In latch mode (logic low), the output

reflects the input state just prior to the comparator being placed in the latch mode. LEA must

be driven in conjunction with LEA. If left unconnected, the comparator defaults to compare

mode.

5

6

LEA

One of two complementary inputs for Channel A Latch Enable. In compare mode (logic low),

the output tracks changes at the input of the comparator. In latch mode (logic high), the

output reflects the input state just prior to the comparator being placed in the latch mode. LEA

must be driven in conjunction with LEA. If left unconnected, the comparator defaults to

compare mode.

6

7

Negative Supply Terminal.

7

8

−INA

Inverting Analog Input of the Differential Input Stage for Channel A. The inverting A input must

be driven in conjunction with the noninverting A input.

8

9

+INA

Noninverting Analog Input of the Differential Input Stage for Channel A. The noninverting A

input must be driven in conjunction with the inverting A input.

10

HYSA

Programmable Hysteresis Input.

11

HYSB

Programmable Hysteresis Input.

9

12

+INB

Noninverting Analog Input of the Differential Input Stage for Channel B. The noninverting B

input must be driven in conjunction with the inverting B input.

10

13

−INB

Inverting Analog Input of the Differential Input Stage for Channel B. The inverting B input must

be driven in conjunction with the noninverting B input.

11

14

Positive Supply Terminal.

12

15

LEB

One of two complementary inputs for Channel B Latch Enable. In compare mode (logic low),

the output tracks changes at the input of the comparator. In latch mode (logic high), the

output reflects the input state just prior to the comparator being placed in the latch mode. LEB

must be driven in conjunction with LEB. If left unconnected, the comparator defaults to

compare mode.