EC24C128A/256A

128K/256K-bit 2-WIRE SERIAL CMOS EEPROM

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3I23N-Rev.F002

Pin Descriptions

DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs that are

hard-wired for the EC24C128A/EC24C256A. Eight 128K/256K devices may be addressed on a single bus

system (device addressing is discussed in detail under the Device Addressing section).

SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and

may be wire-ORed with any number of other open-drain or open- collector devices.

SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and

negative edge clock data out of each device.

WRITE PROTECT (WP): The EC24C128A/EC24C256A has a Write Protect pin that provides hardware data

protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When

following Table.

Write Protect

WP Pin Status

Part of the Array Protected

EC24C128A

EC24C256A

Full (128K) Array

Full (256K) Array

At GND

Normal Read / Write Operations

Ordering/ Marking Information

Available package types

Part Number

SOP-8

TSSOP-8

MSOP-8

PDIP-8

EC24C128A

V

V

V

V

EC24C256A

V

V

X

V