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PIC12CE673-04/P Scheda tecnica(PDF) 93 Page - Microchip Technology |
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PIC12CE673-04/P Scheda tecnica(HTML) 93 Page - Microchip Technology |
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93 / 116 page ![]() © 1998 Microchip Technology Inc. Preliminary DS40181B-page 93 PIC12CE67X FIGURE 12-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, AND POWER-UP TIMER TIMING TABLE 12-5: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER Parameter No. Sym Characteristic Min Typ† Max Units Conditions 30 TmcL MCLR Pulse Width (low) 2 — — µs VDD = 5V, –40˚C to +125˚C 31* Twdt Watchdog Timer Time-out Period (No Prescaler) 7 18 33 ms VDD = 5V, –40˚C to +125˚C 32 Tost Oscillation Start-up Timer Period — 1024TOSC — — TOSC = OSC1 period 33* Tpwrt Power up Timer Period 28 72 132 ms VDD = 5V, –40˚C to +125˚C 34 TIOZ I/O Hi-impedance from MCLR Low or Watchdog Timer Reset — — 2.1 µs * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25 °C unless otherwise stated. These parameters are for design guidance only and are not tested. VDD MCLR Internal POR PWRT Timeout OSC Timeout Internal RESET Watchdog Timer RESET 33 32 30 31 34 I/O Pins 34 36 |
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