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80960JD Scheda tecnica(PDF) 48 Page - Intel Corporation |
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80960JD Scheda tecnica(HTML) 48 Page - Intel Corporation |
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48 / 78 page ![]() 80960JA/JF/JD/JT 3.3 V Microprocessor 48 Advance Information Datasheet Note: The TLX Derating curve applies only when an imbalance in the capacitive load occurs between the AD bus and ALE. The TLX derating is based on a 50 pF load on ALE. The derating applies to ALE and ALE. Figure 11. Output Delay or Hold vs. Load Capacitance Figure 12. TLX vs. AD Bus Load Capacitance AC Timings vs. Load Capacitance nom + 0 nom + 1 nom + 2 nom + 3 nom + 4 nom + 5 nom + 6 nom + 7 50 100 150 AD Bus Capacitive Load (pF) Rising Falling Rise and Fall times are identical. AC Timings vs. Load Capacitance nom + 0 nom + 1 nom + 2 nom + 3 nom + 4 nom + 5 nom + 6 nom + 7 50 100 150 AD Bus Capacitive Load (pF) Rising Falling Rise and Fall times are identical. |
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