ICS8735AM-21 datasheet(11/15 Pages) ETC

11 / 15 page

8735AM-21

www.icst.com/products/hiperclocks.html

REV. D OCTOBER 27, 2003

Integrated

Circuit

Systems, Inc.

ICS8735-21

700MHZ, DIFFERENTIAL-TO-3.3V LVPECL

ZERO DELAY CLOCK GENERATOR

3. Calculations and Equations.

The purpose of this section is to derive the power dissipated into the load.

LVPECL output driver circuit and termination are shown in

Figure 6.

To calculate worst case power dissipation into the load, use the following equations which assume a 50

Ω load, and a termination

voltage of V

CCO

- 2V.

•

For logic high, V

OUT

= V

OH_MAX

= V

CCO_MAX

– 1.0V

CCO_MAX

- V

OH_MAX

) = 1.0V

•

For logic low, V

OUT

= V

OL_MAX

= V

CCO_MAX

– 1.7V

CCO_MAX

- V

OL_MAX

) = 1.7V

Pd_H is power dissipation when the output drives high.

Pd_L is the power dissipation when the output drives low.

Pd_H = [(V

OH_MAX

– (V

CCO_MAX

- 2V))/R

] * (V

CCO_MAX

- V

OH_MAX

) = [(2V - (V

CCO_MAX

- V

OH_MAX

))/R

] * (V

CCO_MAX

- V

OH_MAX

) =

[(2V - 1V)/50

Ω] * 1V = 20.0mW

Pd_L = [(V

OL_MAX

– (V

CCO_MAX

- 2V))/R

] * (V

CCO_MAX

- V

OL_MAX

) = [(2V - (V

CCO_MAX

- V

OL_MAX

))/R

] * (V

CCO_MAX

- V

OL_MAX

) =

[(2V - 1.7V)/50

Ω] * 1.7V = 10.2mW

Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW

FIGURE 6. LVPECL DRIVER CIRCUIT AND TERMINATION

OUT

CCO

CCO - 2V

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