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TPS2849PWPR Scheda tecnica(PDF) 4 Page - Texas Instruments

Il numero della parte TPS2849PWPR
Spiegazioni elettronici  SYNCHRONOUS BUCK MOSFET DRIVERS WITH DRIVE REGULATOR
PDF  20 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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TPS2849PWPR Scheda tecnica(HTML) 4 Page - Texas Instruments

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TPS2838, TPS2839
TPS2848, TPS2849
SLVS367A – MARCH 2001 – REVISED JUNE 2001
4
www.ti.com
Terminal Functions
TERMINAL
NAME
NO.
DESCRIPTION
NAME
TPS283x
TPS284x
DESCRIPTION
ADJ
6
—
Adjust. The adjust pin is the feedback pin for the drive regulator (TPS283X only)
AGND
8
7
Analog ground
BOOT
16
14
Bootstrap. A capacitor is connected between the BOOT and BOOTLO pins to develop the floating
bootstrap voltage for the high-side MOSFET. The capacitor value is typically between 0.1
µF and 1 µF.
BOOTLO
14
12
Boot low. This pin connects to the junction of the high-side and low-side MOSFETs.
DELAY
4
4
Delay. Connecting a capacitor between this pin and ground adjusts the deadtime for high-side driver
DT
7
6
Deadtime control. Connect DT to the junction of the high-side and low-side MOSFETs
ENABLE
1
1
Enable. If ENABLE is low, both drivers are off.
HIGHDR
15
13
High drive. This pin is the output drive for the high-side power MOSFET.
IN
2
2
Input. This pin is the input signal to the MOSFET drivers.
LOWDR
11
9
Low drive. This pin is the output drive for the low-side power MOSFET.
NC
10
5
No internal connection
PGND
9
8
Power ground. This pin is connected to the FET power ground.
PWRRDY
3
3
Power ready. This open-drain pin indicates a power good for VDRV and VCC.
SYNC
5
—
Synchronous rectifier enable. If SYNC is low, the low-side driver is always off; if SYNC is high, the
low-side driver provides gate drive to the low-side MOSFET.
VCC
13
11
Input power supply. It is recommended that a capacitor (minimum 1
µF) be connected from VCC to
PGND. Note that VCC must be 2 V higher than VDRV.
VDRV
12
10
Drive regulator output voltage. It is recommended that a capacitor (minimum 1
µF) be connected from
VDRV to PGND. Note that VCC must be 2 V higher than VDRV.
detailed description
low-side driver
The low-side driver is designed to drive low rDS(on) N-channel MOSFETs. The current rating of the driver is 4 A,
source and sink.
high-side driver
The high-side driver is designed to drive low rDS(on) N-channel MOSFETs. The current rating of the driver is 4 A
minimum, source and sink. The high-side driver can be configured as a GND-reference driver or as a
floating-bootstrap driver. The internal bootstrap diode is a Schottky, for improved drive efficiency. The maximum
voltage that can be applied from BOOT to ground is 30 V.
dead-time (DT) control
Dead-time control prevents shoot-through current from flowing through the main power FETs during switching
transitions by controlling the turnon times of the MOSFET drivers. The high-side driver is not allowed to turn
on until the gate drive voltage to the low-side FET is low, and the low-side driver is not allowed to turn on until
the voltage at the junction of the power FETs (BOOTLO) is low. The TTL-compatible DT terminal connects to
the junction of the power FETs.
ENABLE
The ENABLE terminal enables the drivers. When enable is low, the output drivers are low. ENABLE is a
TTL-compatible digital terminal.



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