MFC2000 datasheet(3/426 Pages) ETC

3 / 426 page

100723A

Conexant

iii

Contents

INTRODUCTION .............................................................................................................................................. 1-1

1.1 SCOPE ...................................................................................................................................................... 1-1

1.2 SYSTEM OVERVIEW ................................................................................................................................ 1-1

1.3 REFERENCE DOCUMENTATION ............................................................................................................ 1-5

MFC2000 SUMMARY ...................................................................................................................................... 2-1

2.1 MFC2000 DEVICE FAMILY....................................................................................................................... 2-1

2.2 MFC2000 SYSTEM BLOCK DIAGRAM .................................................................................................... 2-1

HARDWARE INTERFACE............................................................................................................................... 3-1

3.1 PIN DESCRIPTION ................................................................................................................................... 3-1

3.2 MAXIMUM RATINGS................................................................................................................................. 3-7

3.3 ELECTRICAL CHARACTERISTICS.......................................................................................................... 3-8

3.4 PIN LAYOUT............................................................................................................................................ 3-10

CPU AND BUS INTERFACE ........................................................................................................................... 4-1

4.1 MEMORY MAP AND CHIP SELECT DESCRIPTION ............................................................................... 4-1

4.2 CACHE MEMORY CONTROLLER.......................................................................................................... 4-19

4.3 SIU………. ............................................................................................................................................... 4-24

4.4 INTERRUPT CONTROLLER................................................................................................................... 4-46

4.5 DRAM CONTROLLER (INCLUDING BATTERY DRAM) ........................................................................ 4-54

4.6 FLASH MEMORY CONTROLLER........................................................................................................... 4-72

4.7 DMA CONTROLLER ............................................................................................................................... 4-76

RESET LOGIC/BATTERY BACKUP/WATCH DOG TIMER........................................................................... 5-1

5.1 RESET LOGIC/BATTERY BACKUP ......................................................................................................... 5-1

5.2 WATCHDOG TIMER ............................................................................................................................... 5-11

FAX TIMING CONTROL INTERFACE ............................................................................................................ 6-1

6.1 PLL………….. ............................................................................................................................................ 6-1

6.2 FAX TIMING LOGIC .................................................................................................................................. 6-2

6.3 MFC2000 TIMING CHAIN ......................................................................................................................... 6-3

6.4 SCAN CONTROL TIMING......................................................................................................................... 6-4

6.5 FAX TIMING REGISTERS......................................................................................................................... 6-5

VIDEO/SCANNER CONTROLLER ................................................................................................................. 7-1

7.1 SCANNER CONTROLLER........................................................................................................................ 7-2

7.2 SERIAL PROGRAMMING INTERFACE.................................................................................................. 7-41

7.3 VIDEO CONTROLLER ............................................................................................................................ 7-50

ADC……........................................................................................................................................................... 8-1

8.1 PADC AND SCAN ANALOG FRONT END ...............................................................................................8-1

8.2 TADC……………………. ........................................................................................................................... 8-5

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