LC823450 datasheet(2/112 Pages) ONSEMI

2 / 112 page

LC823450

www.onsemi.com

ABSTRACT

Features

• Cortex−M3 Dual Core, AMBA® (AHB/APB) System

♦ Internal SRAM (1

.5M-byte)

♦ Internal ROM (256k

-byte). Boot code, Standard

Functions

♦ SDRAM Controller (1 * CS)

64M to 256Mbit SDRAM / Mobile SDRAM

♦ External Memory Controller (2 * CS)

NOR FLASH, SRAM, ROM supported, 8/16 bit I/F

LCD controller supported

Internal ROM boot and External memory device

boot available

♦ DMA Controller (8ch)

♦ Interrupt Controller (External 90ch, Internal 82ch)

♦ SPI (1ch)

♦ Serial Flash I/F (1ch)

Quad SPI, cache memory (16k

-byte, 4way set

associative, 128line) function available

1.8V dedicated power supply

♦ UART (3ch)

UART1: w/flow control (CTS

, RTS)

UART0, UART2: w/o flow control

♦ I2C (2ch) Single Master, Full/Standard

♦ GPIO (90ch)

♦ Plain Timer w/ Watch Dog Timer (1ch

×3)

♦ Multiple Timer (2ch

×4)

♦ 10bit ADC (6ch)

♦ SD Card I/F (3ch)

eSD/eMMC, UHS−I, w/o CPRM

− SD0: eSD/eMMC boot supported (Internal ROM

Boot function) 1.8 V dedicated power supply

− SD1: Multiplexed w/ Memory Stick I/F

1.8 V dedicated power supply

− SD2: 1.8 V dedicated power supply

♦ Memory Stick I/F (1ch)

Multiplexed w/ SD1

♦ USB2.0 Host (HS/FS/LS) Controller, Device

(HS/FS) Controller. Integrated PHY

Xtal (XT1) is required for USB function

48 MHz for Host

, and 12,20,24,48 MHz for device

w/o OTG function. Host and Device share an

integrated PHY.

♦ Real Time Clock

2 modes below are available

− General RTC mode: RTC w/o key input

− KeyInt RTC mode: RTC w/ key input which

enables power on function

♦ SWD (Serial Wire Debug) is supported as the debug

interface.

SWV (Serial Wire Viewer) is supported as the trace

interfaceOnly one of Cortex−M3 Dual Core can be

traced.

Availability of features explained here depends on products.

• MP31 Hard Wired Encoder/Decoder

♦ MP3 MPEG1, MPEG2, MPEG2.5

− Sampling rate: 8 kHz,11.025 kHz,12 kHz,16 kHz,

22.05 kHz, 24 kHz, 32 kHz, 44.1 kHz, 48 kHz

− Bit rate:8 Kbps to 320 Kbps (Decoder−VBR

supported)

• LPDSP32 System

♦ Internal SRAM (120 kbyte)

♦ Internal ROM (220 kbyte)

♦ WMA2 (Microsoft WMA Decoder Profile Level3)

− Sampling rate: 8 kHz, 11.025 kHz, 16 kHz,

22.05 kHz, 32 kHz, 44.1 kHz, 48 kHz

− Bit rate: 5 Kbps to 320 Kbps (VBR supported)

♦ AAC (MPEG4 LC−AAC)

− Bit rate: 8 Kbps to 320 Kbps (VBR supported)

♦ Variable Speed Control playback

(0.5 to 4.0 times speed)

− While WMA and AAC playback, up to 2.0 time

speed

− While PCM playback, up to 4.0 times speed

− While MP3 playback w/ hard wired decoder,

up to 4.0 times speed

♦ Noise Canceller, etc

♦ JTAG ICE

MPEG Layer−3 audio coding technology licensed from Fraunhofer IIS and Thomson.

Supply of this product does not convey license nor imply any right to distribute content created with this product in revenue−generating

broadcast systems (terrestrial, satellite, cable and/or other distribution channels), streaming applications (via Internet, intranets and/or

networks), other content distribution systems (pay−audio or audio−on−demand applications and the like) or on physical media (compact

discs, digital versatile discs, semiconductor chips, hard drives, memory cards and the like). For details, please visit http://mp3licensing.-

com/

Supply of this product does not convey license under the relevant intellectual property of Thomson and/or Fraunhofer Gesellschaft nor

imply any right to use this product in any finished end user or ready−to−use final product. An independent license for such use is required.

For details, please visit http://mp3licensing.com/.

This product contain technology of Microsoft company ownership, and you cannot distribute or use without getting license from Microsoft

Licensing company.

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