93C46B-ESLASHMS datasheet(8/24 Pages) MICROCHIP

8 / 24 page

93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C

DS21749D-page 8

 2003 Microchip Technology Inc.

2.6

ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)

The 93XX46A/B/C powers up in the ERASE/WRITE

Disable (EWDS) state. All Programming modes must be

preceded

ERASE/WRITE

Enable

(EWEN)

instruction. Once the EWEN instruction is executed,

programming remains enabled until an EWDS instruction is

executed or Vcc is removed from the device.

To protect against accidental data disturbance, the EWDS

instruction can be used to disable all ERASE/WRITE

functions and should follow all programming operations.

Execution of a READ instruction is independent of both the

EWEN

and EWDS instructions.

FIGURE 2-5:

EWDS TIMING

FIGURE 2-6:

EWEN TIMING

2.7

READ

The READ instruction outputs the serial data of the

addressed memory location on the DO pin. A dummy

zero bit precedes the 8-bit (If ORG pin is low or A-Version

devices) or 16-bit (If ORG pin is high or B-version

devices) output string. The output data bits will toggle on

the rising edge of the CLK and are stable after the

specified time delay (TPD). Sequential read is possible

when CS is held high. The memory data will

automatically cycle to the next register and output

sequentially.

FIGURE 2-7:

READ TIMING

CLK

•••

TCSL

CLK

TCSL

•••

CLK

•••

HIGH-Z

0Dx

•••

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