MOSA

MS6720L

Low Cost 3 Stereo Inputs / 4-Channel Outputs Audio Processor

REV 2

7/12

www.mosanalog.com

BUS INTERFACE

Data are transmitted to and from the MCU to the MS6720L via the SDA and SCL. The SDA and SCL make up the

BUS interface. It should be noted that pull-up resistors must be connected to the positive supply voltage.

SDA (Serial Data Line)

Rp

Rp

SCL (Serial Clock Line)

Pull up resistors

MCU

MS6720L

Interface Protocol

The format consists of the following

•A START condition

•A chip address byte including the MS6720L address. (7bits)

•The 8

•MS6720L must always acknowledge the end of each transmitted byte.

•A data sequence (N-bytes + Acknowledge)

•A STOP condition

SCL

SDA

1-7

8

9

1-7

8

9

9

8

1-7

S

P

ADDRESS

--

ACK

ACK

ACK

DATA

DATA

START

CONDITION

STOP

CONDITION

Address Code

The chip address of the MS6720L is 88H.

1

0

0

0

0

0

1

0

7 bits address

MS6720L address

W