MB91F585ASH datasheet(36/176 Pages) CYPRESS

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Document Number: 002-04665 Rev *A

Page 35 of 175

MB91580M/S Series

The power supply pins should be connected to VCC and VSS of this device at the low impedance from the power

supply source.

In the area close to this device, a ceramic capacitor having the capacitance larger than the capacitor of C pin is

recommended to use as a bypass capacitor between VCC and VSS pins.

 Crystal oscillation circuit

An external noise to the X0 or X1 pin may cause a device malfunction. The printed circuit board must be designed to

lay out X0 and X1 pins, crystal oscillator (or ceramic resonator), and the bypass capacitor to be grounded to the close

position to the device.

The printed circuit board artwork is recommended to surround the X0 and X1 pins by ground circuits.

 Mode pin (MD[1:0])

Connect the MD[1:0] mode pin to the VCC or VSS pin directly.

To prevent an erroneous selection of test mode caused by the noise, reduce the pattern length between each mode

pin and VCC or VSS pin on the printed circuit board. Also, use the low-impedance pin connection.

 During power-on

To prevent a malfunction of the voltage step-down circuit built in the dev

ice, set the voltage rising time to have 50μs or

longer (between 0.2V and 2.7V) during power-on.

 Notes during PLL clock operation

When the PLL clock is selected and if the oscillator is disconnected or if the input is stopped, this clock may continue

to operate at the free running frequency of the self oscillator circuit built in the PLL. This operation is not guaranteed.

 Treatment of A/D converter power supply pins

Connect the pins to have AVCC0 = AVCC1 = AVRH0 = AVRH1 = VCC,

AVSS0/AVRL0 = AVSS1/AVRL1 = VSS even if the A/D converter is not used.

 Note on using external clock

The external clock is unsupported.

External direct clock input cannot use.

MB91F585ASH Scheda tecnica(PDF) 36 Page - Cypress Semiconductor