S70FS01GS datasheet(2/141 Pages) CYPRESS

2 / 141 page

Document Number: 002-03833 Rev. *C

Page 2 of 141

S70FS01GS

Contents

Performance Summary

........................................................ 1

Overview

....................................................................... 3

1.1 General Description ....................................................... 3

1.2 Migration Notes.............................................................. 3

1.3 Glossary......................................................................... 6

1.4 Other Resources............................................................ 7

Signal Descriptions

..................................................... 8

2.1 Input/Output Summary................................................... 8

2.2 Multiple Input / Output (MIO).......................................... 9

2.3 Serial Clock (SCK) ......................................................... 9

2.4 Chip Select (CS#) .......................................................... 9

2.5 Serial Input (SI) / IO0 ..................................................... 9

2.6 Serial Output (SO) / IO1................................................. 9

2.7 Write Protect (WP#) / IO2 .............................................. 9

2.8

IO3 / RESET# ............................................................. 10

2.9 Voltage Supply (VDD)................................................... 10

2.10 Supply and Signal Ground (VSS) ................................. 10

2.11 Not Connected (NC) .................................................... 10

2.12 Reserved for Future Use (RFU)................................... 10

2.13 Do Not Use (DNU) ....................................................... 11

2.14 Block Diagrams............................................................ 11

Signal Protocols

......................................................... 13

3.1 SPI Clock Modes ......................................................... 13

3.2 Command Protocol ...................................................... 14

3.3 Interface States............................................................ 18

3.4 Configuration Register Effects on the Interface ........... 22

3.5 Data Protection ............................................................ 22

Electrical Specifications

............................................ 23

4.1 Absolute Maximum Ratings ......................................... 23

4.2 Latchup Characteristics ............................................... 23

4.3 Operating Ranges........................................................ 23

4.4 Power-Up and Power-Down ........................................ 24

4.5 DC Characteristics ....................................................... 26

Timing Specifications

................................................ 29

5.1 Key to Switching Waveforms ....................................... 29

5.2 AC Test Conditions ...................................................... 29

5.3 Reset............................................................................ 30

5.4 SDR AC Characteristics............................................... 33

5.5 DDR AC Characteristics .............................................. 36

Physical Interface

...................................................... 39

6.1 Connection Diagrams .................................................. 39

6.2 Physical Diagrams ....................................................... 40

Address Space Maps

................................................. 42

7.1 Overview ...................................................................... 42

7.2 Flash Memory Array..................................................... 42

7.3 ID-CFI Address Space ................................................. 43

7.4 JEDEC JESD216 Serial Flash Discoverable Parameters

(SFDP) Space.............................................................. 43

7.5 OTP Address Space .................................................... 44

7.6 Error Correction Code (ECC)....................................... 45

7.7 Registers...................................................................... 45

Data Protection

........................................................... 62

8.1 Secure Silicon Region (OTP)........................................ 62

8.2 Write Enable Command................................................ 63

8.3 Block Protection............................................................ 63

8.4 Advanced Sector Protection ......................................... 64

8.5 Recommended Protection Process .............................. 70

Commands

.................................................................. 71

9.1 Command Set Summary............................................... 72

9.2 Identification Commands .............................................. 77

9.3 Register Access Commands......................................... 79

9.4 Read Memory Array Commands .................................. 87

9.5 Program Flash Array Commands ................................. 95

9.6 Erase Flash Array Commands...................................... 97

9.7 One Time Program Array Commands ........................ 104

9.8 Advanced Sector Protection Commands.................... 105

9.9 Reset Commands ....................................................... 110

9.10 DPD Commands......................................................... 112

10.

Data Integrity

............................................................. 114

10.1 Erase Endurance ........................................................ 114

10.2 Data Retention............................................................ 114

11.

Embedded Algorithm Performance Tables

............ 115

12.

Software Interface Reference

.................................. 116

12.1 Serial Flash Discoverable Parameters (SFDP) Address

Map............................................................................. 116

12.2 Device ID and Common Flash Interface (ID-CFI) Address

Map............................................................................. 119

12.3 Initial Delivery State .................................................... 133

12.4 FS01GS Behavior and Software Modifications........... 134

13.

Ordering Information

................................................ 137

13.1 Ordering Part Number................................................. 137

14.

Revision History

........................................................ 139

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