ADA4625-1ARDZ-R7 datasheet(17/30 Pages) AD

17 / 30 page

Data Sheet

ADA4625-1

Rev. 0 | Page 17 of 30

–10

–5

–15

–30

–25

–20

TIME (400ns/DIV)

VSY = ±18V

RL = 2kΩ

CL = 100pF

DUT AV = –1

ERROR BAND

POST GAIN = 20

+10mV

–10mV

INPUT

OUTPUT

Figure 52. Negative Setting Time to 0.01%, VSY = ±18 V

–10

–5

–15

–30

–25

–20

TIME (400ns/DIV)

VSY = ±18V

RL = 2kΩ

CL = 100pF

DUT AV = –1

ERROR BAND

POST GAIN = 20

+100mV

–100mV

INPUT

OUTPUT

Figure 53. Positive Settling Time 0.1%, VSY = ±18 V

–10

–5

–15

–30

–25

–20

TIME (400ns/DIV)

VSY = ±18V

RL = 2kΩ

CL = 100pF

DUT AV = –1

ERROR BAND

POST GAIN = 20

+10mV

–10mV

INPUT

OUTPUT

Figure 54. Positive Settling Time 0.01%, VSY = ±18 V

–3

–1

–5

–11

–9

–7

TIME (400ns/DIV)

VSY = 5V

VCM = 1.5V

RL = 2kΩ

CL = 100pF

DUT AV = –1

+4mV

–4mV

ERROR BAND

POST GAIN = 20

INPUT

OUTPUT

Figure 55. Negative Setting Time to 0.01%, VSY = 5 V

–3

–1

–5

–11

–9

–7

TIME (400ns/DIV)

VSY = 5V

VCM = 1.5V

RL = 2kΩ

CL = 100pF

DUT AV = –1

+40mV

–40mV

ERROR BAND

POST GAIN = 20

INPUT

OUTPUT

Figure 56. Positive Settling Time 0.1%, VSY = 5 V

–3

–1

–5

–11

–9

–7

TIME (400ns/DIV)

VSY = 5V

VCM = 1.5V

RL = 2kΩ

CL = 100pF

DUT AV = –1

+4mV

–4mV

ERROR BAND

POST GAIN = 20

INPUT

OUTPUT

Figure 57. Positive Settling Time 0.01%, VSY = 5 V

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