LTC1644IGN datasheet(13/24 Pages) LINER

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LTC1644

1644f

APPLICATIO S I FOR ATIO

Figure 3. Normal Power-Down Sequence

Figure 2. Normal Power-Up Sequence

TIMER

During a power-up sequence, a 21

µA current source is

connected to the TIMER pin (Pin 4) and current limit faults

are ignored until the voltage ramps to within 1V of 12VIN

(Pin 1). This feature allows the chip to power up CPCI

boards with widely varying capacitive loads on the sup-

plies. The power-up time for any one of the four outputs is

given by Equation 2:

tXV

CXV

OUT

LOAD XVOUT

OUT

LIMIT XVOUT

LOAD XVOUT

() =•

•

−









()

(2)

where XVOUT = 5VOUT, 3VOUT, 12VOUT or VEEOUT (–12V).

For example, for CLOAD(5VOUT) = 2000µF, ILIMIT(5VOUT) =

7A and ILOAD(5VOUT) = 5A, the 5VOUT turn-on time will be

~10ms. By substituting the variables in Equation 2 with the

appropriate values, the turn-on time for the other three

outputs can be calculated.

The timer period should be set longer than the maximum

supply turn-on time but short enough to not exceed the

maximum safe operating area of the pass transistor during

a short circuit. The timer period for the LTC1644 is given

by:

TIMER

•

(3)

As a design aid, the timer period as a function of the timing

capacitor using standard values from 0.01

µF to 1µF is

shown in Table 2.

TIMER

10V/DIV

GATE

5V/DIV

12VOUT

10V/DIV

VEEOUT

10V/DIV

5VOUT

10V/DIV

3VOUT

10V/DIV

LOCAL_PCI_RST#

5V/DIV

BD_SEL#

5V/DIV

HEALTHY#

5V/DIV

PRECHARGE

5V/DIV

10ms/DIV

1644 F02

TIMER

10V/DIV

GATE

5V/DIV

12VOUT

10V/DIV

VEEOUT

10V/DIV

5VOUT

10V/DIV

3VOUT

10V/DIV

LOCAL_PCI_RST#

5V/DIV

BD_SEL#

5V/DIV

HEALTHY#

5V/DIV

PRECHARGE

5V/DIV

10ms/DIV

1644 F03

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