LTC1644IGN datasheet(18/24 Pages) LINER

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LTC1644

1644f

APPLICATIO S I FOR ATIO

OFF/ON

5VIN

LTC1644*

1644 F10

R13

Ω 5%

R14

Ω 5%

I/O

PCI

BRIDGE

CHIP

UP TO 128 I/O LINES

DATA BUS

3VIN

GND

PRECHARGE

DRIVE

MMBT2222A

R11

10k

R12

10k

PRECHARGE OUT

±10%

IOUT = ±55mA

R10

Ω 5%

MMBT3906

R24

75k

R19

1k 5%

R20

1.2k

R22 2.74

Ω

R23

51k 5%

1k 5%

Ω 5%

C3 4.7nF

Ω

Z4: 1PMT5.0AT3

*ADDITIONAL PINS OMITTED FOR CLARITY

PCB EDGE

BACKPLANE

CONNECTOR

BACKPLANE

CONNECTOR

LONG 5V

BD_SEL#

GROUND

I/O PIN 1

I/O PIN 128

0.01

µF

C9 0.1

µF

PER 10

POWER PINS

BUS SWITCH

Figure 10. Precharge Circuit with Bus Switch

MMBT2222A

C3 4.7nF

Ω

R10A

R10B

Ω

3VIN

PRECHARGE OUT

1644 F08

GND

PRECHARGE DRIVE

LTC1644*

812

*ADDITIONAL DETAILS OMITTED FOR CLARITY

VPRECHARGE =

• 1V

R10A

R10A + R10B

Figure 8. Precharge Voltage <1V Application Circuit

Figure 9. Precharge Voltage >1V Application Circuit

MMBT2222A

C3 4.7nF

Ω

R10A

R10B

Ω

3VIN

PRECHARGE OUT

1644 F09

GND

PRECHARGE

DRIVE

LTC1644*

812

*ADDITIONAL DETAILS OMITTED FOR CLARITY

VPRECHARGE =

• 1V

R10A + R10B

R10A

(3) the gate-source (VGS) voltage drive for the specified

RDS(ON). Power MOSFET power dissipation is dependent

on four parameters: current delivered to the load, ILOAD;

device RDS(ON); device thermal resistance, junction-to-

ambient,

θJA; and the maximum ambient temperature to

which the circuit will be exposed, TA(MAX). All four of these

parameters determine the junction temperature of the

MOSFET. For reliable circuit operation, the maximum

junction temperature (TJ(MAX))forapowerMOSFETshould

not exceed the manufacturer’s recommended value. For a

given set of conditions, the junction temperature of a

power MOSFET is given by Equation 9:

MOSFET Junction Temperature,

(9)

TJ(MAX) ≤ TA(MAX) + θJA • PD

where PD = ILOAD • RDS(ON)

PCB layout techniques for optimal thermal management

of power MOSFET power dissipation help to keep device

θJA as low as possible. See PCB Layout Considerations

section for more information.

The RDS(ON) of the external pass transistor should be low

to make its drain-source voltage (VDS) a small percentage

of 3VIN or 5VIN. For example, at 3VIN = 3.3V, VDS + VCB =

0.1V yields a 3% error at maximum load current. This

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