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AT89C51ED2-RDTIM Scheda tecnica(PDF) 74 Page - ATMEL Corporation |
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AT89C51ED2-RDTIM Scheda tecnica(HTML) 74 Page - ATMEL Corporation |
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74 / 137 page ![]() 74 AT89C51RD2/ED2 4235E–8051–04/04 Registers The PCA interrupt vector is located at address 0033H, the SPI interrupt vector is located at address 004BH and Keyboard interrupt vector is located at address 003BH. All other vectors addresses are the same as standard C52 devices. Table 51. Priority Level Bit Values A low-priority interrupt can be interrupted by a high priority interrupt, but not by another low-priority interrupt. A high-priority interrupt can’t be interrupted by any other interrupt source. If two interrupt requests of different priority levels are received simultaneously, the request of higher priority level is serviced. If interrupt requests of the same priority level are received simultaneously, an internal polling sequence determines which request is serviced. Thus within each priority level there is a second priority structure determined by the polling sequence. IPH.x IPL.x Interrupt Level Priority 0 0 0 (Lowest) 01 1 10 2 1 1 3 (Highest) |
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