WM8950 datasheet(18/52 Pages) WOLFSON

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WM8950

Preliminary Technical Data

PTD Rev 2.1 June 2005

ANALOGUE TO DIGITAL CONVERTER (ADC)

The WM8950 uses a multi-bit, oversampled sigma-delta ADC channel. The use of multi-bit feedback

and high oversampling rates reduces the effects of jitter and high frequency noise. The ADC Full

Scale input level is proportional to AVDD. With a 3.3V supply voltage, the full scale level is 1.0Vrms.

Any voltage greater than -1dBfs may overload the ADC and cause distortion.

ADC DIGITAL FILTERS

The ADC filters perform true 24 bit signal processing to convert the raw multi-bit oversampled data

from the ADC to the correct sampling frequency to be output on the digital audio interface. The

digital filter path is illustrated in Figure 10 .

Figure 10 ADC Digital Filter Path

The ADC is enabled by the ADCEN register bit.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

Power

management 2

ADCEN

0 = ADC disabled

1 = ADC enabled

Table 8 ADC Enable

The polarity of the output signal can also be changed under software control using the ADCPOL

The oversampling rate of the ADC can be adjusted using the ADCOSR register bit.

With ADCOSR=0 the oversample rate is 64x which gives lowest power operation and when

ADCOSR=1 the oversample rate is 128x which gives best performance.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

ADCOSR

ADC oversample rate select:

0=64x (lower power)

1=128x (best performance)

R14

ADC Control

ADCPOL

0=normal

1=inverted

Table 9 ADC Oversample Rate Select

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