SA25F020 Advanced Information
SAIFUN
33
Powerup and Powerdown
The device must not be selected at
powerup or powerdown (that is, CSb must
follow the voltage applied on VCC) until VCC
reaches the correct value, as follows:
•= VCC(min) at powerup, and then for a
further delay of tPU (as described in
Table 11)
•= VSS at powerdown
A simple pull-up resistor on CSb can
usually be used to insure safe and proper
powerup and powerdown. To avoid data
corruption and inadvertent write operations
during powerup, a Power On Reset (POR)
circuit is included. The logic inside the
device is held at reset while VCC is less
than the POR threshold value (VPOR), all
operations are disabled and the device
does not respond to any instructions.
The device ignores all instructions until a
time delay of tPU has elapsed after the
moment that VCC rises above the VWI
threshold. However, correct operation of
the device is not guaranteed if by this time
VCC is still below VCC(min). No Write Status
Register, Program or Erase instructions
should be sent until tPU reaches the
minimum VCC threshold after VCC.
At powerup, the device is in Standby mode
(not SP mode) and the WEN bit is reset.
Normal precautions must be taken for
supply rail decoupling to stabilize the VCC
feed. Each device in a system should have
the VCC rail decoupled by a suitable
capacitor close to the package pins (this
capacitor is generally of the order of
0.1 µF).
All operations are disabled and the device
does not respond to any instructions when
VCC drops at powerdown from the
operating voltage to below the VPOR
threshold. (The designer must be aware
that if a powerdown occurs while a Write,
Program or Erase cycle is in progress, data
corruption can result.)
Table 11. Powerup
Symbol
Parameter
Min.
Max.
Unit
VPOR
POR Threshold
Value
2.2
2.4
V
tPU
VCC(min) to CS
low
2
ms
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