IC-MR3 datasheet(8/63 Pages) ICHAUS

8 / 63 page

iC-MR3 13-BIT S&H SIN/COS INTERPOLATOR

WITH 2.5 V / 5 V CONTROLLER INTERFACES

Rev C1, Page 8/63

ELECTRICAL CHARACTERISTICS

Operating conditions:

VDDA = VDD = 4.5...5.5 V, VDDP = 2.375...VDDx, GNDA = GND = 0 V, IBP calibrated to 200 µA, Tj = -40...135 °C, unless otherwise noted.

Item

Symbol

Parameter

Conditions

Unit

No.

Min.

Typ.

Max.

General

001 VDDA,

VDD

Permissible Supply Voltage

4.5

5.5

002 I(VDDA)

VDDA Supply Current

003 I(VDD)

VDD Supply Current

004 VDDP

Permissible Dig. Supply Voltage

2.375

VDD

005 I(VDDP)

VDDP Supply Current

no load at I/O interface pins

006 Vc()hi

Clamp Voltage hi

at digital inputs ASLI, SLI, MAI,

NCS, NL, NRD, NWR, NRES,

NERR, SDA, SCL, TMS

Vc()hi = V() - V(VDDP),

0.3

1.2

I() = 4 mA

007 Vc()hi

Clamp Voltage hi

at digital inputs D(7...0)

Vc()hi = V() - V(VDDP),

0.3

1.2

I() = 1.6 mA

008 Vcz()hi

Clamp Voltage hi

at ACO, VDDA, PSO, NSO, PCO,

NCO, AMAO, SLO, ADC, PSI,

NSI, VREF, PCI, NCI

I() = 4 mA

009 Vc()lo

Clamp Voltage lo

at ACO, VDDA, PSO, NSO, PCO,

NCO, AMAO, SLO, ADC, PSI,

NSI, VREF, PCI, NCI

I() = -4 mA

-1.2

-0.3

Bias Current Source, Reference Voltages, Input/Output VREF

101 IBP

Bias Current Source

IBP calibrated to 200 µA

92.5

100

107.5

102 VPAH

Reference Voltage VPAH

relative to GNDA

%VDDA

103 V05

Reference Voltage V05

450

500

570

104 VREFI

Internal Ref. Voltage VREFI

DCPOS = 1

1.35

1.5

1.65

DCPOS = 0

2.25

2.5

2.75

105 Vin()

Permissible Input Voltage

VREFex at VREF

SELREF = 0x3

0.5

VDDA

−

106 Rin()

Input Resistance at VREF

SELREF = 0x3, REFVOS = 0x3, UIN = 1,

TUIN = 0, Rin() relative to VREFin()

kΩ

107 Vref()out

Output Voltage at VREF

SELREF = 0x2, I() = 0

100

%VREFI

108 I0()

Leakage Current at VREF

SELREF = 0x0 or 0x1

-1

µA

12-bit A/D Converter, Measuring Input ADC

601 Vin()max

Permissible Input Voltage

VDDA

602 Vin()FS

Maximum Full Scale Input

Voltage

ADCSLOP = 0xFF

2.5

ADCSLOP = 0x00

2.0

603 RESOadc Converter Resolution

bit

604 tp()adc

Conversion Time

1.1

605 I0()adc

Leakage Current

-100

+100

606 INL()adc

Integral Nonlinearity

after calibration

LSB

607 ∆INL()adc INL Temperature Drift

LSB/K

Signal Conditioning, Inputs: PSI, NSI, PCI, NCI

701 Vin()sig

Permissible V-Mode Input

Voltage

UIN = 1, TUIN = 0 (V-Mode 1:1)

0.75

VDDA

−

1.5

UIN = 1, TUIN = 1, DCPOS = 1 (V-Mode 4:1)

-0.1

VDDA

+ 0.1

702 Iin()

V-Mode Input Current

UIN = 1, TUIN = 0 (V-Mode 1:1)

-100

100

703 Rin()

V-Mode Input Resistance

relative to VREFin, UIN = 1, TUIN = 1;

15.0

28.5

kΩ

Tj = 27 °C (V-Mode 4:1)

16.4

23.6

kΩ

704 Iin()sig

Permissible I-Mode Input Current UIN = 0, DCPOS = 0

-300

-10

µA

UIN = 0, DCPOS = 1

300

µA

705 CTR()sig

Permissible Signal Contrast Ratio current ratio of Iin()pkpk to Iin()dc

0.125

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