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TP2014 Scheda tecnica(PDF) 12 Page - 3PEAK INC.

Il numero della parte TP2014
Spiegazioni elettronici  Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
PDF  21 Pages
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Produttore elettronici  3PEAK [3PEAK INC.]
Homepage  http://www.3peakic.com/
Logo 3PEAK - 3PEAK INC.

TP2014 Scheda tecnica(HTML) 12 Page - 3PEAK INC.

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TP2011/TP2012/TP2014
Ultra-Low Power 200nA, 1.6V, RRIO, Push-Pull Output Comparators
Inverting Comparator with Hysteresis
The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply
voltage (VDD), as shown in Figure 5.
Figure 5. Inverting Configuration with Hysteresis
When Vi is greater than V+, the output voltage is low. In this case, the three network resistors can be presented as
paralleled resistor R2 || R3 in series with R1. When Vi at the inverting input is less than V+, the output voltage is high.
The three network resistors can be represented as R1 ||R3 in series with R2.
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Low Input Bias Current
The TP201x family is a CMOS comparator family and features very low input bias current in pA range. The low input
bias current allows the comparators to be used in applications with high resistance sources. Care must be taken to
minimize PCB Surface Leakage. See below section on “PCB Surface Leakage” for more details.
PCB Surface Leakage
In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be
considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity
conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5pA of current to flow,
which is greater than the TP201x’s input bias current at +27°C (±6pA, typical). It is recommended to use multi-layer
PCB layout and route the comparator’s -IN and +IN signal under the PCB surface.
The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is
biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 6 for Inverting
configuration application.
1. For Non-Inverting Configuration:
a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface.
b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the same reference as the
comparator.



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