V62SLASH13624-01XE-R datasheet(61/77 Pages) TI1

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Direction

0: Input

1: Output

P2SEL.6

P2DIR.6

P2IN.6

P2IRQ.6

Module X IN

Module X OUT

P2OUT.6

Interrupt

Edge Select

Set

P2SEL.6

P2IES.6

P2IFG.6

P2IE.6

DVSS

DVCC

P2REN.6

Pad Logic

Bus

Keeper

P2SEL.7

P2.6/XIN/CA6

LFXT1CLK

P2.7/XOUT/CA7

LFXT1 off

BCSCTL3.LFXT1Sx = 11

From

Comparator

To Comparator

CAPD.6

MSP430F2132-EP

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SLAS913A – JULY 2013 – REVISED AUGUST 2013

Product Folder Links: MSP430F2132-EP

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(1)

X = Don't care

(2)

Setting the CAPD.x bit disables the output driver as well as the input to prevent parasitic cross currents when applying analog signals.

Selecting the CAx input to the comparator multiplexer with the P2CAx bits automatically disables the input buffer for that pin, regardless

of the state of the associated CAPD.x bit.

6.9 Port P2 Pin Schematic: P2.6, Input/Output With Schmitt Trigger

Table 24. Port P2 (P2.6) Pin Functions

PIN NAME (P2.x)

FUNCTION

CONTROL BITS AND SIGNALS(1)

CAPD.6

P2DIR.6

P2SEL.6

P2SEL2.x = 0

P2.6/XIN/CA6

P2.6 (I/O)

I: 0; O: 1

XIN (default)

CA6(2)

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