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GD25LH40C Scheda tecnica(PDF) 53 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25LH40C Scheda tecnica(HTML) 53 Page - GigaDevice Semiconductor (Beijing) Inc. |
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53 / 69 page ![]() 1.8V Uniform Sector Dual and Quad Serial Flash GD25LH40C/20C/10C/05C 53 tPP Page Programming Time 0.35 0.8 ms tSE Sector Erase Time 40 300 ms tBE Block Erase Time (32K Bytes) 0.15 0.8 s tBE Block Erase Time (64K Bytes) 0.18 1 s tCE Chip Erase Time (GD25LH40C) 1.25 3 s tCE Chip Erase Time (GD25LH20C) 0.8 1.5 s tCE Chip Erase Time (GD25LH10C) 0.4 1 s tCE Chip Erase Time (GD25LH05C) 0.2 1 s Note: 1. Typical values given for TA=25°C. 2. Value guaranteed by design and/or characterization, not 100% tested in production. Figure40. Serial Input Timing SCLK CS# SI MSB SO High-Z LSB tCHSL tSLCH tDVCH tCHDX tSHCH tCHSH tCHCL tCLCH tSHSL Figure41. Output Timing Figure 42. Resume to Suspend Timing Diagram CS# Resume Command tRS Suspend Command CS# SCLK SO SI Least significant address bit (LIB) in tCLQV tCLQX tCLQX tCLQV tCLH tCLL tSHQZ LSB |
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