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8086-2 Scheda tecnica(PDF) 18 Page - Intel Corporation |
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8086-2 Scheda tecnica(HTML) 18 Page - Intel Corporation |
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18 / 30 page ![]() 8086 WAVEFORMS (Continued) MINIMUM MODE (Continued) 231455 – 14 SOFTWARE HALT– RD, WR, INTA e VOH DT/R e INDETERMINATE NOTES: 1. All signals switch between VOH and VOL unless otherwise specified. 2. RDY is sampled near the end of T2, T3, TW to determine if TW machines states are to be inserted. 3. Two INTA cycles run back-to-back. The 8086 LOCAL ADDR/DATA BUS is floating during both INTA cycles. Control signals shown for second INTA cycle. 4. Signals at 8284A are shown for reference only. 5. All timing measurements are made at 1.5V unless otherwise noted. 18 |
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