MA2901

8

AC ELECTRICAL CHARACTERISTICS

Read-Modify-Write Cycle (from selection of A,B registers to end of a cycle

40ns

Maximum Clock Frequency to shift Q(50% duty cycle, I = 432 or 632)

25MHz

Minimum Clock LOW time

20ns

Minimum Clock HIGH time

20ns

Minimum Clock Period

40ns

Note: 1. These timings are applied during functional tests and are not routinely measured.

Figure 12: Cycle Time and Clock Characteristics

To Output

From Input

Y

G,P

F = 0

OVR

A,B Address

65

55

60

55

70

65

65

-

D

55

40

50

50

65

55

55

-

60

40

35

-

55

35

50

-

70

50

55

55

70

55

65

-

60

45

50

45

65

50

65

-

45

-

-

-

-

-

30

30

A Bypass ALU(I=2xx)

45

-

-

-

-

-

-

-

Clock

55

50

55

50

50

55

55

35

Note: All timings in ns

Figure 13: Combinational Propagation Delays

Input

CP:

Set-up Time

Before H

Hold Time

After H

Set-up Time

Before L

Hold Time

After L

A,B Source Address

25

5

30

-

B Destination Address

25

No change

No change

5

D

-

-

40

0

-

-

40

0

-

-

45

0

-

-

45

0

10

No change

No change

10

-

-

15

10

MIL-STD-883, method 5005, subgroups 9, 10, 11

Note:

1. VDD = 5V±10%, over full operational temperature range

2. CL = 5

0 pF

Figure 14: Set-up and Hold Times Relative to Clock (CP) Input