11-334
RF3000
Rev A4 031216
The RF3000 begins the algorithm by setting the RXVGC and LNAGS pins to a predetermined maximum gain condition.
Upon detection of A/D saturation, the RF3000 will decrease the system gain (via the RXVGC pin) to a predetermined
“mid-point”. This mid point is chosen to allow the RF3000 to determine the correct setting of the LNAGS pin. If the
RF3000 detects saturation at this “mid-point”, the RF3000 will place the RF front end into a low gain mode, and will begin
searching for the correct RXVGC setting in a binary tree fashion. If the RF3000 does not detect saturation on the A/D
converters while at this “mid-point”, the RF3000 will leave the LNAGS pin in high gain mode and proceed with the binary
search of RXVGC. This binary tree representation of the gain algorithm can be seen in Figure 9. It is important to note
that once the RF3000 makes a decision on the LNAGS setting, that setting will remain for the entire duration of the
packet and cannot be altered until the next packet.
RSSI is a function of RXVGC and LNAGS. RSSI is updated every 1
µS during the AGC algorithm. While demodulating
data, the demodulator will make fine tuning adjustments to RSSI based on the value of RXVGC.
An optional AGC algorithm is available, enabled by writing a '1' into bit 4 of Register 0x1C. In this mode the AGC may be
kicked off after it has already settled if a large signal is present. This addresses a scenario in which an interferer (which
may be noise) initially kicks off the AGC. The AGC then chooses the gain setting to accommodate this level of signal.
Subsequently, a desired signal is incident on the antenna. This signal may be larger than the interferer and, because of
the gain setting of the radio, may be difficult to demodulate. Under the optional AGC mode, the gain would be re-opti-
mized to the desired signal. We believe that this will help radio performance in many environments. When using the new
AGC algorithm, Register 0x1C should be written to 0x78. The values of 0, 1, 1 in b7, b6, b5 respectively increases the
saturation requirement for the AGC algorithm. This has the effect of biasing the algorithm to produce a higher gain set-
ting to give the baseband processor an optimum input amplitude for robust demodulation.
t=0
1uS
2uS
3uS
6uS
...
Time(t)
Min Gain
Solid Lines are shifted
along the Gain axis
with adjustment of
Register 0x15
Dashed Lines are shifted
along the Gain axis
with adjustment of
Register 0x14
Indicates decision points
Max Gain
Gain (VGC, LNAGS)
Figure 10. AGC Decision Structure
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