11-343
RF3000
Rev A4 031216
Register 0x14 - Low Gain Calibration
Bit 5 .. Bit 0:Low Gain Calibration, Range -32 to +16
Register 0x15 - High Gain Calibration
Bit 7:
A value of ‘1’ enables the channel 14 filter
Bit 6:
6dB pad of DS modes
Bit 5 .. Bit 0:High Gain Calibration, Range -8 to +31
Register 0x16 - Reserved
Register 0x17 - Reserved
Register 0x18 - Reserved
Register 0x19 - Reserved
Register 0x1A - Reserved
Register 0x1B - Reserved
Register 0x1C - Options Register 1
Bit 7 .. Bit 5:Signed Magnitude Offset for all steps of course AGC. Saturation threshold is 4+ value where V=3<Value<3.
Bit 4:
A value of ‘1’ allows the AGC algorithm to retrigger with ADC saturation.
Bit 3:
A value of ‘1’ enables the alternate TX/RX data bus interface.
Bit 2:
Reserved, set to ‘0’.
Register 0x1D - Options Register 2
Bit 7:
LNAGs Delay-When set to ‘1’, this delays the next AGC decision step an extra 1
µS (total of 2µS) if a transition
of the LNAGs pin from 1 to 0 occurs.
Bit 6 .. Bit 3:Reserved, set to ‘0’.
Bit 2:
Sets threshold for AGC re-trigger.
‘0’ sets re-trigger threshold to high count.
‘1’ sets re-trigger threshold to low count.
Bit 1:
Reserved, set to ‘0’.
Bit 0:
Reserved, set to ‘0’.
Register 0x1E - Reserved
Register 0x1F - Reserved
Reserved
Reserved
Low_Gain5
Low_Gain4
Low_Gain3
Low_Gain2
Low_Gain1
Low_Gain0
Bit 7
Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Channel 14 Filter DSSS PAD
High_Gain5
High_Gain4
High_Gain3
High_Gain2
High_Gain1
High_Gain0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SAT_THRESH [2] SAT_THRESH [1] SAT_THRESH [0] ALT AGC Enabled Alternative
Data Port Interface
RESERVED ’0’ RESERVED ‘0’ RESERVED ‘0’
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
LNAGS DELAY
RESERVED ‘0’ RESERVED ‘0’ RESERVED ‘0’ RESERVED ‘0’ AGC Re-trigger
Threshold
RESERVED ‘0’ RESERVED ‘0’
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