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PIC24H Scheda tecnica(PDF) 55 Page - Microchip Technology

Il numero della parte PIC24H
Spiegazioni elettronici  High-Performance, 16-bit Microcontrollers
PDF  290 Pages
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
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PIC24H Scheda tecnica(HTML) 55 Page - Microchip Technology

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© 2006 Microchip Technology Inc.
Preliminary
DS70175D-page 55
PIC24H
4.0
FLASH PROGRAM MEMORY
The PIC24H devices contain internal Flash program
memory for storing and executing application code.
The memory is readable, writable and erasable during
normal operation over the entire VDD range.
Flash memory can be programmed in two ways:
1.
In-Circuit Serial Programming™ (ICSP™)
programming capability
2.
Run-Time Self-Programming (RTSP)
ICSP programming capability allows a PIC24H device
to be serially programmed while in the end application
circuit. This is simply done with two lines for program-
ming clock and programming data (one of the alternate
programming pin pairs: PGC1/PGD1, PGC2/PGD2 or
PGC3/PGD3, and three other lines for power (VDD),
ground (VSS) and Master Clear (MCLR). This allows
customers to manufacture boards with unprogrammed
devices and then program the digital signal controller
just before shipping the product. This also allows the
most recent firmware or a custom firmware to be
programmed.
RTSP is accomplished using TBLRD (table read) and
TBLWT
(table write) instructions. With RTSP, the user
can write program memory data either in blocks or
‘rows’ of 64 instructions (192 bytes) at a time, or single
instructions and erase program memory in blocks or
‘pages’ of 512 instructions (1536 bytes) at a time.
4.1
Table Instructions and Flash
Programming
Regardless of the method used, all programming of
Flash memory is done with the table read and table
write instructions. These allow direct read and write
access to the program memory space from the data
memory while the device is in normal operating mode.
The 24-bit target address in the program memory is
formed using bits<7:0> of the TBLPAG register and the
Effective Address (EA) from a W register specified in
the table instruction, as shown in Figure 4-1.
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL
and TBLWTL can access program memory in
both Word and Byte modes.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can also access program memory in Word
or Byte mode.
FIGURE 4-1:
ADDRESSING FOR TABLE REGISTERS
Note:
This data sheet summarizes the features
of this group of PIC24H devices. It is not
intended to be a comprehensive reference
source. To complement the information in
this data sheet, refer to the “dsPIC30F
Family Reference Manual” (DS70046).
0
Program Counter
24 bits
Program Counter
TBLPAG Reg
8 bits
Working Reg EA
16 bits
Byte
24-bit EA
0
1/0
Select
Using
Table Instruction
Using
User/Configuration
Space Select



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