PIC24H datasheet(147/290 Pages) MICROCHIP

147 / 290 page

Preliminary

DS70175D-page 147

PIC24H

13.0

INPUT CAPTURE

The input capture module is useful in applications

requiring frequency (period) and pulse measurement.

The PIC24H devices support up to eight input capture

channels.

The input capture module captures the 16-bit value of

the selected Time Base register when an event occurs

at the ICx pin. The events that cause a capture event

are listed below in three categories:

Simple Capture Event modes

-Capture timer value on every falling edge of

input at ICx pin

-Capture timer value on every rising edge of

input at ICx pin

Capture timer value on every edge (rising and

falling)

Prescaler Capture Event modes

-Capture timer value on every 4th rising edge

of input at ICx pin

-Capture timer value on every 16th rising

edge of input at ICx pin

Each input capture channel can select between one of

two 16-bit timers (Timer2 or Timer3) for the time base.

The selected timer can use either an internal or

external clock.

Other operational features include:

• Device wake-up from capture pin during CPU

Sleep and Idle modes

• Interrupt on input capture event

• 4-word FIFO buffer for capture values

- Interrupt optionally generated after 1, 2, 3 or

4 buffer locations are filled

• Input capture can also be used to provide

additional sources of external interrupts

FIGURE 13-1:

INPUT CAPTURE BLOCK DIAGRAM

Note:

This data sheet summarizes the features

of this group of PIC24H devices. It is not

intended to be a comprehensive reference

source. To complement the information in

this data sheet, refer to the “dsPIC30F

Family Reference Manual” (DS70046).

Note:

Only IC1 and IC2 can trigger a DMA data

transfer.

DMA

data

transfers

are

required, the FIFO buffer size must be set

to 1 (ICI<1:0> = 00).

ICxBUF

ICx Pin

ICM<2:0> (ICxCON<2:0>)

Mode Select

Set Flag ICxIF

(in IFSn Register)

TMRy TMRz

Edge Detection Logic

FIFO

R/W

Logic

ICxI<1:0>

ICOV, ICBNE (ICxCON<4:3>)

ICxCON

Interrupt

Logic

System Bus

From 16-bit Timers

ICTMR

(ICxCON<7>)

Prescaler

Counter

(1, 4, 16)

and

Clock Synchronizer

Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.

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