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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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WM8960CGEFL/V Scheda tecnica(PDF) 7 Page - Cirrus Logic |
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WM8960CGEFL/V Scheda tecnica(HTML) 7 Page - Cirrus Logic |
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7 / 94 page  WM8960 Rev 4.4 7 ELECTRICAL CHARACTERISTICS Test Conditions DCVDD = 1.8V, DBVDD = 3.3V, AVDD = SPKVDD1 = SPKVDD2 = 3.3V, TA = +25 oC, 1kHz signal, fs = 48kHz, PGA gain = 0dB, 24-bit audio data unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Analogue Inputs (LINPUT1, RINPUT1, LINPUT2, LINPUT3, RINPUT2, RINPUT3) Full-scale Input Signal Level – note this changes in proportion to AVDD VINFS L/RINPUT1,2,3 Single-ended 1.0 0 Vrms dBV L/RINPUT1,2,3 Differential MIC 0.5 -6 Vrms dBV Mic PGA equivalent input noise 0 to 20kHz, +30dB gain 150 uV Input resistance (Note that input boost and bypass path resistances will be seen in parallel with PGA input resistance when these paths are enabled) L/RINPUT1 +30dB PGA gain Differential or single- ended MIC configuration 3 k L/RINPUT1 0dB PGA gain Differential or single- ended MIC configuration 49 k L/RINPUT1 -17.25dB PGA gain Differential or single- ended MIC configuration 87 k L/RINPUT2, L/RINPUT3 (Constant for all gains) Differential MIC configuration 85 k L/RINPUT2, L/RINPUT3 Max boost gain L/RINPUT2/3 to boost 7.5 k L/RINPUT2, L/RINPUT3 0dB boost gain L/RINPUT2/3 to boost 13 k L/RINPUT2, L/RINPUT3 Min boost gain L/RINPUT2/3 to boost 37 k L/RINPUT3 Max bypass gain L/RINPUT3 to bypass 17 k L/RINPUT3 Min bypass gain L/RINPUT3 to bypass 70 k Input capacitance 10 pF MIC Programmable Gain Amplifier (PGA) Programmable Gain Min -17.25 dB Programmable Gain Max 30 dB Programmable Gain Step Size Guaranteed monotonic 0.75 dB Mute Attenuation LMIC2B = 0 and RMIC2B = 0 85 dB Selectable Input Gain Boost Gain Boost Steps Input from PGA 0, 13, 20, 29, mute dB Input from L/RINPUT2 or L/RINPUT3 -12, -9, -6, -3, 0, 3, 6, mute dB |
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