ASM3P623S00AG-08-SR datasheet(3/16 Pages) ALSC

3 / 16 page

July 2005

ASM3P623S00A/B/C/D/E/F

rev 1.0

Zero Cycle Slip Peak EMI Reduction IC

3 of 16

Notice: The information in this document is subject to change without notice.

Pin Description for ASM3P623S00A/B/C

Pin #

Pin Name

Description

CLKIN

Input reference frequency, 5V-tolerant input

No Connect

SS%

Spread Spectrum Selection

GND

Ground

SSON

Spread Spectrum enable and disable option When SSON is HIGH, the spread

spectrum is enabled and when LOW, it turns off the spread spectrum.

CLKOUT

1,3

Buffered clock output

VDD

3.3V supply

No Connect

Pin Description for ASM3P623S00D/E/F

Pin #

Pin Name

Description

CLKIN

Input reference frequency, 5V tolerant input

CLKOUT1

Buffered clock output

VDD

3.3V supply

SS%

Spread Spectrum Selection

GND

Ground

CLKOUT2

Buffered clock output

CLKOUT3

Buffered clock output

DLY CNTRL

The pin is used to skew the outputs such that they align with the input. The skew can

is in the range of 100-200pS

SSON

Spread Spectrum enable and disable option. When SSON is HIGH, the spread

spectrum is enabled and when LOW, it turns off the spread spectrum.

CLKOUT4

Buffered clock output

CLKOUT5

Buffered clock output

GND

Ground

VDD

3.3V supply

CLKOUT6

Buffered clock output

CLKOUT7

Buffered clock output

CLKOUT8

Buffered clock output

Notes:

1. This output is driven and has an internal feedback for the PLL.

2. Weak pull-down. 3. Weak pull-down on all outputs. 4. Weak pull-up on these inputs.

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