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TP0610TG Scheda tecnica(PDF) 1 Page - Microchip Technology |
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TP0610TG Scheda tecnica(HTML) 1 Page - Microchip Technology |
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1 / 14 page ![]() 2019-2020 Microchip Technology Inc. DS20005701B-page 1 TP0610T Features • High Input Impedance and High Gain • Low Power Drive Requirement • Ease of Paralleling • Low CISS and Fast Switching Speeds • Excellent Thermal Stability • Integral Source-Drain Diode • Free from Secondary Breakdown Applications • Logic-Level Interfaces (Ideal for TTL and CMOS) • Solid-State Relays • Battery-Operated Systems • Photo-Voltaic Drives • Analog Switches • Power Management • Telecommunication Switches General Description The TP0610T is a low-threshold, Enhancement-mode (normally-off) transistor that utilizes a vertical DMOS structure and a well-proven silicon gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. Microchip’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Package Type 3-lead SOT-23 (TO-236AB) (Top view) See Table 3-1 for pin information. DRAIN SOURCE GATE P-Channel Enhancement-Mode Vertical DMOS FET |
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