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MC56F81663 Scheda tecnica(PDF) 60 Page - NXP Semiconductors

Il numero della parte MC56F81663
Spiegazioni elettronici  DSC based on 32-bit 56800EX core
PDF  73 Pages
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

MC56F81663 Scheda tecnica(HTML) 60 Page - NXP Semiconductors

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Table 31. Comparator and 8-bit DAC electrical specifications (continued)
Symbol
Description
Min.
Typ.
Max.
Unit
IDAC8b
8-bit DAC current adder (enabled)
7
μA
Vreference
8-bit DAC reference inputs, Vin1 and Vin2
There are two reference input options selectable (via
VRSEL control bit). The reference options must fall
within this range.
VDD
V
INL
8-bit DAC integral non-linearity
–1
1
LSB5
DNL
8-bit DAC differential non-linearity
–1
1
LSB
1. Measured with input voltage range limited to 0.7≤Vin≤VDD-0.8
2. Measured with input voltage range limited to 0 to VDD
3. Input voltage range: 0.1VDD≤Vin≤0.9VDD, step = ±100mV, across all temperature. Does not include PCB and PAD delay.
4. Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to DACEN,
VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level.
5. 1 LSB = Vreference/256
000.00E+00
50.00E-03
100.00E-03
150.00E-03
200.00E-03
250.00E-03
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2
Vin Level (V)
0
1
2
3
hystCR
Figure 12. Typical hysteresis vs. Vin level (VDD = 3.3 V, PMODE = 0)
000.00E+00
50.00E-03
100.00E-03
150.00E-03
200.00E-03
250.00E-03
300.00E-03
350.00E-03
400.00E-03
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3 3.1 3.2
Vin Level (V)
0
1
2
3
hystCR
Figure 13. Typical hysteresis vs. Vin level (VDD = 3.3 V, PMODE = 1)
System modules
MC56F81xxx, Rev. 1.1, 12/2020
60
NXP Semiconductors



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