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ADRF5250BCPZ-R7 Scheda tecnica(PDF) 12 Page - Analog Devices |
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ADRF5250BCPZ-R7 Scheda tecnica(HTML) 12 Page - Analog Devices |
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12 / 15 page ![]() ADRF5250 Data Sheet Rev. 0 | Page 12 of 15 APPLICATIONS INFORMATION EVALUATION BOARD Figure 18 and Figure 19 show the top and cross sectional views of the evaluation board, which uses 4-layer construction with a copper thickness of 0.5 oz (0.7 mil) and dielectric materials between each copper layer. 1400mil Figure 18. Evaluation Board Layout Top View 0.5oz Cu (0.7mil) 0.5oz Cu (0.7mil) 0.5oz Cu (0.7mil) 0.5oz Cu (0.7mil) 10mil ROGERS 4350B 10mil ROGERS 4350B 8mil ROGERS 4450F 0.5oz Cu (0.7mil) 0.5oz Cu (0.7mil) 0.5oz Cu (0.7mil) W = 8mil G = 10mil Figure 19. Evaluation Board Cross Sectional View All RF traces are routed on Layer 2; the V1, V3, and VSS dc traces are routed on Layer 3; the V2 and VDD dc traces are routed on the top layer; and the other remaining layers are grounded planes that provide a solid ground for RF transmission lines. The top and bottom dielectric material are Rogers 4350B, offering low loss performance. The middle dielectric material is Rogers 4450F and is used to achieve an overall board thickness of 30 mil. The RF transmission lines were designed using a coplanar waveguide (CPWG) model with a width of 8 mil and ground spacing of 10 mil for a characteristic impedance of 50 Ω. For optimal RF and thermal grounding, as many plated through vias as possible are arranged around the transmission lines and under the exposed pad of the package. Figure 20 shows the actual ADRF5250 evaluation board with component placement. Two power supply ports are connected to the VDD and VSS test points, TP3 and TP5, and the ground reference is connected to the GND test point, TP6. On the digital control and VDD supply traces, bypass capacitors are used. Figure 20. ADRF5250-EVALZ Evaluation Board Three control ports are connected to the V1, V2, and V3 test points, TP1, TP2, and TP4, respectively. On each control trace, a resistor position is available to improve the isolation between the RF and control signals. The RF ports are connected to the RFC, RF1, RF2, RF3, RF4, and RF5 connectors (J6, J8, J7, J5, J2, and J1), which are end launch jack SMA RF connectors. A through transmission line that connects unpopulated RF connectors (J3 and J4) is also available to measure the loss of the PCB. Figure 22 and Table 6 show the evaluation board schematic and bill of materials, respectively. The evaluation board shown in Figure 20 is available for order from the Analog Devices, Inc., website at www.analog.com. |
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