EM78P152S datasheet(24/52 Pages) ETC1

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EM78P152/3S

8-Bit Microcontroller with OTP ROM

5.5.3 Status of RST, T, and P of the Status Register

A Reset condition is initiated by the following events

1) A power-on condition

2) A high-low-high pulse on /RESET pin

3) Watchdog timer time-out

The values of T and P listed in the table below are used to check how the processor

wakes up.

Table 5-2

Values of RST, T, and P after a Reset

Reset Type

RST

Power on

/RESET during Operating mode

/RESET wake-up during Sleep mode

WDT during Operating mode

WDT wake-up during Sleep mode

Wake-up on pin change during Sleep mode

* P: Previous status before reset

The following table shows the events that may affect the status of T and P.

Table 5-3

Status of T and P Being Affected by Events

Event

RST

Power on

WDTC instruction

WDT time-out

SLEP instruction

Wake-up on pin change during Sleep mode

* P: Previous status before reset

Voltage

Detector

Power-on

Reset

WDTE

Setup Time

VDD

CLK

CLR

CLK

RESET

WDT

Timeout

WDT

/RESET

Oscillator

Figure 5-9 Controller Reset Block Diagram

•

Product Specification (V1.8) 09.08.2009

(This specification is subject to change without further notice)

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