PIMXRT406LCVL4A datasheet(3/71 Pages) NXP

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i.MX RT1015 introduction

i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 2, 03/2021

NXP Semiconductors

– Each support standard capture and compare operation

– Quadrature decoder integrated

— One FlexPWM

– Up to 8 individual PWM channels

– 16-bit resolution PWM suitable for Motor Control applications

— One Quadrature Encoder/Decoder

Each i.MX RT1015 processor enables the following interfaces to external devices (some of them are

muxed and not available simultaneously):

•

Audio:

— S/PDIF input and output

— Three synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and

codec/DSP interfaces

— MQS interface for medium quality audio via GPIO pads

•

Connectivity:

— One USB 2.0 OTG controller with integrated PHY interface

— Four universal asynchronous receiver/transmitter (UARTs) modules

— Two I2C modules

— Two SPI modules

•

GPIO and Pin Multiplexing:

— General-purpose input/output (GPIO) modules with interrupt capability

— Input/output multiplexing controller (IOMUXC) to provide centralized pad control

— 57 GPIOs

— One FlexIO

The i.MX RT1015 processors integrate advanced power management unit and controllers:

•

Full PMIC integration, including on-chip DCDC and LDOs

•

Temperature sensor with programmable trip points

•

GPC hardware power management controller

The i.MX RT1015 processors support the following system debug:

•

Arm CortexM7 CoreSight debug and trace architecture

•

Trace Port Interface Unit (TPIU) to support off-chip real-time trace

•

Support for 5-pin (JTAG) and SWD debug interfaces selected by eFuse

Security functions are enabled and accelerated by the following hardware:

•

High Assurance Boot (HAB)

•

Data Co-Processor (DCP):

— AES-128, ECB, and CBC mode

— SHA-1 and SHA-256

— CRC-32

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