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PIMXRT406LCJM4A Scheda tecnica(PDF) 1 Page - NXP Semiconductors |
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PIMXRT406LCJM4A Scheda tecnica(HTML) 1 Page - NXP Semiconductors |
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1 / 71 page ![]() NXP Semiconductors Data Sheet: Technical Data Document Number: IMXRT1015IEC Rev. 2, 03/2021 MIMXRT1015CAF4A Package Information Plastic Package 100-Pin LQFP, 14 x 14 mm, 0.5 mm pitch Ordering Information See Table 1 on page 4 NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its products. © 2019-2021 NXP B.V. 1 i.MX RT1015 introduction The i.MX RT1015 is a processor of i.MX RT family featuring NXP’s advanced implementation of the Arm® Cortex®-M7 core, which operates at speeds up to 396 MHz to provide high CPU performance and real-time response. The i.MX RT1015 processor has 128 KB on-chip RAM, which can be flexibly configured as TCM or general-purpose on-chip RAM. The i.MX RT1015 integrates advanced power management module with DCDC and LDO that reduces complexity of external power supply and simplifies power sequencing. The i.MX RT1015 also provides various memory interfaces, including Quad SPI, and a wide range of connectivity interfaces including UART, SPI, I2C, and USB; for connecting peripherals including Bluetooth™, and GPS. The i.MX RT1015 also has rich audio features, including SPDIF and I2S audio interface. Various analog IP integration, including ADC, temperature sensor, etc. i.MX RT1015 Crossover Processors Data Sheet for Industrial Products 1. i.MX RT1015 introduction . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 1.2. Ordering information . . . . . . . . . . . . . . . . . . . . . . . 4 2. Architectural overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3. Modules list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3.1. Special signal considerations . . . . . . . . . . . . . . . 12 3.2. Recommended connections for unused analog interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1. Chip-level conditions . . . . . . . . . . . . . . . . . . . . . . 14 4.2. System power and clocks . . . . . . . . . . . . . . . . . . 20 4.3. I/O parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.4. System modules . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.5. External memory interface . . . . . . . . . . . . . . . . . 36 4.6. Audio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 4.7. Analog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 4.8. Communication interfaces . . . . . . . . . . . . . . . . . . 51 4.9. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 5. Boot mode configuration . . . . . . . . . . . . . . . . . . . . . . . . 57 5.1. Boot mode configuration pins . . . . . . . . . . . . . . . 57 5.2. Boot device interface allocation . . . . . . . . . . . . . . 57 6. Package information and contact assignments . . . . . . . 60 6.1. 14 x 14 mm package information . . . . . . . . . . . . 60 7. Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 |
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