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PIMXRT406LCFP4A Scheda tecnica(PDF) 62 Page - NXP Semiconductors |
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PIMXRT406LCFP4A Scheda tecnica(HTML) 62 Page - NXP Semiconductors |
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62 / 71 page ![]() i.MX RT1015 Crossover Processors Data Sheet for Industrial Products, Rev. 2, 03/2021 62 NXP Semiconductors Package information and contact assignments 6.1.2 14 x 14 mm supplies contact assignments and functional contact assignments Table 58 shows the device connection list for ground, sense, and reference contact signals. Table 59 shows an alpha-sorted list of functional contact assignments for the 14 x 14 mm package. Table 58. 14 x 14 mm supplies contact assignment Supply Rail Name Pin(s) Position(s) Remark DCDC_IN 23 — DCDC_IN_Q 27 — DCDC_GND 24 — DCDC_LP 25 — DCDC_PSWITCH 26 — NVCC_GPIO 5, 20, 58, 71, 80, 95 — NGND_KEL0 43 — NVCC_PLL 50 — VDD_HIGH_CAP 44 — VDD_HIGH_IN 48 — VDD_SNVS_CAP 35 — VDD_SNVS_IN 34 — VDD_SOC_IN 18, 28, 69, 81, 91 — VDD_USB_CAP 40 — VDDA_ADC_3P3 51 — VSS 19, 29, 39, 49, 59, 70, 79, 92 — Table 59. 14 x 14 mm functional contact assignments Pin Name 14 x 14 Pin Power Group Pin Type Default Setting Default Mode Default Function Input/ Output Value GPIO_AD_B0_00 78 NVCC_GPIO Digital GPIO ALT0 jtag_mux.TMS Input 47 K PU GPIO_AD_B0_01 77 NVCC_GPIO Digital GPIO ALT0 jtag_mux.TCK Input 100 K PD GPIO_AD_B0_02 76 NVCC_GPIO Digital GPIO ALT0 jtag_mux.MOD Input 100 K PD GPIO_AD_B0_03 75 NVCC_GPIO Digital GPIO ALT0 jtag_mux.TDI Input 47 K PU GPIO_AD_B0_04 74 NVCC_GPIO Digital GPIO ALT0 jtag_mux.TDO Input Keeper |
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