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PIMXRT406LCAF4A Scheda tecnica(PDF) 16 Page - NXP Semiconductors |
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PIMXRT406LCAF4A Scheda tecnica(HTML) 16 Page - NXP Semiconductors |
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16 / 71 page ![]() i.MX RT1015 Crossover Processors Data Sheet for Consumer Products, Rev. 2, 03/2021 16 NXP Semiconductors Electrical characteristics 4.1.3 Operating ranges Table 9 provides the operating ranges of the i.MX RT1015 processors. For details on the chip's power structure, see the “Power Management Unit (PMU)” chapter of the i.MX RT1015 Reference Manual (IMXRT1015RM). Table 9. Operating ranges Parameter Description Symbol Operating Conditions Min Typ Max1 Unit Comment Run Mode VDD_SOC_IN Overdrive 1.25 — 1.3 V — VDD_SOC_IN M7 core at 396 MHz 1.15 — 1.3 V — M7 core at 132 MHz 1.15 — 1.3 M7 core at 24 MHz 0.925 — 1.3 IDLE Mode VDD_SOC_IN M7 core operation at 396 MHz or below 1.15 — 1.3 V — SUSPEND (DSM) Mode VDD_SOC_IN — 0.925 — 1.3 V Refer to Table 12 Low power mode current and power consumption SNVS Mode VDD_SOC_IN — 0 1.3 V — Power for DCDC DCDC_IN — 3.0 3.3 3.6 — VDD_HIGH internal regulator VDD_HIGH_IN2 — 3.0 — 3.6 V Must match the range of voltages that the rechargeable backup battery supports. Backup battery supply range VDD_SNVS_IN3 — 2.40 — 3.6 V Can be combined with VDDHIGH_IN, if the system does not require keeping real time and other data on OFF state. USB supply voltages USB_OTG1_VBUS — 4.40 — 5.5 V — GPIO supplies NVCC_GPIO — 3.0 3.3 3.6 V All digital I/O supplies (NVCC_xxxx) must be powered (unless otherwise specified in this data sheet) under normal conditions whether the associated I/O pins are in use or not. A/D converter VDDA_ADC_3P3 — 3.0 3.3 3.6 V VDDA_ADC_3P3 must be powered even if the ADC is not used. VDDA_ADC_3P3 cannot be powered when the other SoC supplies (except VDD_SNVS_IN) are off. |
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