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M69KB096AA Scheda tecnica(PDF) 42 Page - STMicroelectronics

Il numero della parte M69KB096AA
Spiegazioni elettronici  64 Mbit (4M x16) 1.8V Supply, 80MHz Clock Rate, Burst PSRAM
PDF  48 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M69KB096AA Scheda tecnica(HTML) 42 Page - STMicroelectronics

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Figure 31. Continuous Burst Write Showing an Output Delay for End-of-R ow Condition (BCR8=0)
Note: 1. Non default BCR Register settings: 3 clock cycle latency; WAIT active Low, Burst Wrap bit BCR3 set to ‘0’ (wrap).
2. Clock rates lower than 50MHz (clock period higher than 20ns) are allowed as long as tELKH specifications are met.
3. WAIT will be asserted for a maximum of (2xLC)+1 cycles (LC being the Latency Code set through BCR[13-11])
4. Taking E high or L Low will abort the Burst operation and the writing of the first data.
A0-A21
DQ0-DQ15
K
tKHTV
tKHKH
tKLKH
tF
WAIT
AI06793b
E
G
LB/UB
W
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
tKHTX
L
tKHDX
tDVKH
VALID
INPUT D[n]
VALID
INPUT D[n+1]
End of Row
VALID
INPUT D[n+3]
VALID
INPUT D[n+2]
(3)
VALID
INPUT D[n+4]



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