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ICS10001B21 Scheda tecnica(PDF) 13 Page - Integrated Circuit Systems |
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ICS10001B21 Scheda tecnica(HTML) 13 Page - Integrated Circuit Systems |
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13 / 21 page ![]() 810001BK-21 www.icst.com/products/hiperclocks.html REV. A AUGUST 12, 2005 13 Integrated Circuit Systems, Inc. ICS810001-21 FEMTOCLOCKS™DUAL VCXO VIDEO PLL PRELIMINARY APPLICATION EXAMPLE 2: 27MHZ TO 74.175MHZ Charge Pump VCXO V3:V0 = 0001 Phase Detector Q = 74.125 MHz Output Divider 00 = 4 01 = 8 10 = 12 11 = 18 VCXO Feedback Divider = 1000 VCXO Input Pre-Divider = 1001 VCXO Jitter Attenuation PLL VCXO Divider Table OE = 1 01 MF = 0 MR = 0 Master Reset 0 1 CLK0 = 27 MHz CLK1 = GND CLK_SEL = 0 N1:N0 = 01 4 2 11 10 10 11 01 01 10 11 00 2 nBP1:nBP0 = 11 FemtoClock Frequency Multiplier = x 22 VCXO PLL Loop Characteristics with this configuration: - Bandwidth (-3dB) = 100 Hz - Damping Factor = 1.4 RSET = 4.4k (Makes ISET = 250 A) Cp = 3300 pf Cs = 0.068 F Rs = 261 k |
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