ICS10001B21 datasheet(18/21 Pages) ICST

18 / 21 page

810001BK-21

www.icst.com/products/hiperclocks.html

REV. A AUGUST 12, 2005

Integrated

Circuit

Systems, Inc.

ICS810001-21

FEMTOCLOCKS™DUAL VCXO VIDEO PLL

PRELIMINARY

As in any high speed analog circuitry, the power supply pins

are vulnerable to random noise. The ICS810001-21 provides

separate power supplies to isolate any high switching

noise from the outputs to the internal PLL. V

DD, VDDA, VDDx, and

DDO should be individually connected to the power supply

plane through vias, and bypass capacitors should be

used for each pin. To achieve optimum jitter performance,

power supply isolation is required. Figure 3 illustrates how

a 10

Ω resistor along with a 10μF and a .01μF bypass

capacitor should be connected to each V

DDA pin.

POWER SUPPLY FILTERING TECHNIQUES

FIGURE 3. POWER SUPPLY FILTERING

DDA

μF

.01

μF

3.3V

.01

μF

NOTES ON SETTING CHARGE PUMP CURRENT

The recommended range for the charge pump current is 50

μA

to 300

μA. Below 50μA, loop filter charge leakage, due to PCB or

capacitor leakage, can become a problem.This loop filter leakage

can cause locking problems, output clock cycle slips, or low

frequency phase noise.

1E-3

100E-6

10E-6

10k

100k

RSET, Ω

(

C )

FIGURE 2. CHARGE PUMP CURRENT VS. VALUE OF R

SET (

EXTERNAL RESISTOR

) GRAPH

As can be seen in the loop bandwidth and damping factor

equations or by using the filter response software available from

ICS, increasing charge pump current (I

CP) increases both

bandwidth and damping factor.

CHARGE PUMP CURRENT, EXAMPLE SETTINGS

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