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STM32G070KB Scheda tecnica(PDF) 63 Page - STMicroelectronics

Il numero della parte STM32G070KB
Spiegazioni elettronici  Arm® Cortex®-M0 32-bit MCU, 128 KB Flash, 36 KB RAM, 4x USART, timers, ADC, comm. I/Fs, 2.0-3.6V
PDF  93 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32G070KB Scheda tecnica(HTML) 63 Page - STMicroelectronics

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DS12766 Rev 2
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STM32G070CB/KB/RB
Electrical characteristics
80
All I/Os are CMOS- and TTL-compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters, as shown
in Figure 15.
Figure 15. I/O input characteristics
Output driving current
The GPIOs (general purpose input/outputs) can sink or source up to ±6 mA, and up to
±15 mA with relaxed VOL/VOH.
In the user application, the number of I/O pins which can drive current must be limited to
respect the absolute maximum rating specified in Section 5.2:
The sum of the currents sourced by all the I/Os on VDDIO1, plus the maximum
consumption of the MCU sourced on VDD, cannot exceed the absolute maximum rating
IVDD (see Table 17: Voltage characteristics).
The sum of the currents sunk by all the I/Os on VSS, plus the maximum consumption of
the MCU sunk on VSS, cannot exceed the absolute maximum rating IVSS (see Table 17:
Voltage characteristics).
Output voltage levels
Unless otherwise specified, the parameters given in the table below are derived from tests
performed under the ambient temperature and supply voltage conditions summarized in
4. This value represents the pad leakage of the I/O itself. The total product pad leakage is provided by this formula:
ITotal_Ileak_max = 10 µA + [number of I/Os where VIN is applied on the pad] ₓ Ilkg(Max).
5. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
PMOS/NMOS contribution to the series resistance is minimal (~10% order).
MSv47926V1
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
0
0.5
1
1.5
2
2.5
3
Minimum required
logic level 1 zone
Minimum required
logic level 0 zone
VIHmin
= 0.7
VDDIO
(CMOS
standard
requirement)
VILmax = 0.3
VDDIO
(CMOS standard
requirement)
Undefined input range
VIHmin =
0.49 VDDIO
+ 0.26
VILmax = 0.39
VDDIO - 0.06
VIN (V)
VDDIO (V)
TTL standard requirement
TTL standard requirement
Device characteristics
Test thresholds



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