PV6D2DA datasheet(1/4 Pages) NIKOSEM

Il numero della parte	PV6D2DA

Spiegazioni elettronici	Dual N-Channel Enhancement Mode Field Effect Transistor

PDF	4 Pages

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Produttore elettronici	NIKOSEM [NIKO SEMICONDUCTOR CO., LTD.]

Homepage	http://www.niko-sem.com

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1

L-10-5

Dual N-Channel Enhancement Mode

Field Effect Transistor

PV6D2DA

SOP-8

Halogen-Free & Lead-Free

NIKO-SEM

REV 1.1

PRODUCT SUMMARY

V(BR)DSS

RDS(ON)

ID

40V

25mΩ

6.4A

100% UIS Tested

100% Rg Tested

Features

• Pb−Free, Halogen Free and RoHS compliant.

• Low R

DS(on) to Minimize Conduction Losses.

• Ohmic Region Good R

DS(on) Ratio.

• Optimized Gate Charge to Minimize Switching Losses.

Applications

• Protection Circuits Applications.

• Logic/Load Switch Circuits Applications.

ABSOLUTE MAXIMUM RATINGS (TA = 25 ° C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

UNITS

Drain-Source Voltage

VDS

40

V

Gate-Source Voltage

VGS

±20

V

Continuous Drain Current

TA = 25 ° C

ID

6.4

A

TA = 70 ° C

5.1

Pulsed Drain Current

1

IDM

30

Avalanche Current

IAS

14

Avalanche Energy

L = 0.1mH

EAS

9.8

mJ

Power Dissipation

3

TA = 25 ° C

PD

2.1

W

TA = 70 ° C

1.3

Junction & Storage Temperature Range

TJ, Tstg

-55 to 150

° C

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

TYPICAL

MAXIMUM

UNITS

Junction-to-Ambient

t ≦10s

RJA

60

° C / W

Junction-to-Ambient

Steady-State

RJA

88

Junction-to-Case

RJC

40

1Pulse width limited by maximum junction temperature.

2The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air

environment with TA =25° C.

3The Power dissipation is based on R

JA t ≦10s value

G : GATE

D : DRAIN

S : SOURCE

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