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26HS01GTAM03 Scheda tecnica(PDF) 48 Page - Infineon Technologies AG |
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26HS01GTAM03 Scheda tecnica(HTML) 48 Page - Infineon Technologies AG |
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48 / 166 page  Datasheet 48 of 166 002-12337 Rev. *Y 2022-01-18 256Mb/512Mb/1Gb SEMPER™ Flash HYPERBUS™ interface, 1.8V/3.0V Features 4.6.1.1 Host polling behavior The host will need to go through a Status Register polling sequence to determine if an initialization failure has occurred in the device. The flowchart for the sequence is shown in Figure 32. Figure 32 Host polling sequence for microcontroller initialization failure detection 4.6.1.2 Microcontroller initialization failure detection related registers and transactions Table 35 Microcontroller initialization failure related registers and transactions Related registers (see Section 5.3 Legacy (x1) SPI registers on page 106) Related SPI transactions (see Table 122 on page 137) Related HYPERBUS™ transactions (see Table 120 on page 124) Status Register 1 Volatile (STR1V) Read Any Register (RDARG_4_0) N/A Read Status Register -1 (RDSR1_0_0) Power-Up Read Status Register 1 (x1) OR Read Status Register (x8) Status Register 1 = 0x00? (x1) OR = 0xFE80? (x8) & Any Read Identification Transaction = Successful Device Ready Yes Change Host Interface to SDR SPI (1S-1S-1S) No Read Status Register 1 Hardware Reset Flash Microcontroller Initialization Failure Detected Status Register 1 = 0x61 Power-Up Read Status Register 1 (x1) OR Read Status Register (x8) Status Register 1 = 0x00? (x1) OR = 0xFE80? (x8) & Any Read Identification Transaction = Successful Device Ready Yes Change Host Interface to SDR SPI (1S-1S-1S) No Read Status Register 1 Hardware Reset Flash Microcontroller Initialization Failure Detected Status Register 1 = 0x61 [19] Note 19. If you have Vcc within specifications and a hardware reset does not resolve the issue, replace the flash device. |
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